LONDON — Opnext Inc. (Fremont, Calif.), a developer of optical communications, has announced that it has developed a low-power quad CMOS analog-to-digital converter (ADC), designed for use in a 127-Gbps Polarization Multiplexed Quadrature Phase Shift Keying (PM-QPSK) modulation scheme.
Opnext worked with Mobius Semiconductor Inc. (Irvine, Calif.) on the ADC, which will be integrated with a DSP core and forward error correction into a single PM-QPSK receiver chip using a standard CMOS process. This eliminates numerous connections between the ADC, DSP and the FEC.
The design includes continuous digital background self-calibration and synchronization. As a result the receiver is immune to process, voltage and temperature variations, allowing reliable performance over a broad range of operating conditions. The ADC will use a BGA package enabling volume SMT manufacturing.
Opnext continues to employ selective vertical integration on components suich as the ADC with the goal of delivering the lowest cost and highest performance 100-Gbps OIF MSA-compliant solution to its OEM partners.
Mobius uses digital signal processing assisted mixed-signal calibration techniques to develop a family of multi-gigasample data converters making possible integrated transceivers with significantly reduced cost, power and form factor. Mobius calibration technology is naturally aligned with CMOS scaling and is portable over different foundries and processes. Mobius is also developing low jitter ADPLLs, high-speed SerDes and DACs.
